Field of the Invention
The invention relates to an analytical technique of a surface structure of a chip, and more particularly, to a method for measuring and analyzing a surface structure of a chip or a wafer.
Description of Related Art
As the line width of the IC process continues to reduce in size, the control and monitor of the critical dimension of the process have become more important. In the nano-generation semiconductor technology, accurately obtaining the surface structure of, for instance, the line width on a chip is also becoming more difficult.
The critical dimension scanning electron microscope (CD-SEM) is traditionally more widely used for the line width measurement and the analysis of the surface structure of a chip. However, since the inspection rapid is extremely slow, and there is only a few data output from on photograph, it is impossible to obtain many inspection results in real-time.
For the nano-generation semiconductor chip, the current CD-SEM can only obtain data of a 1D image, such as the roughness measurements of, for instance, line edge roughness (LER) and line width roughness (LWR) of a linear pattern. The measurement of a 2D image can only be done by calculating the contact edge roughness (CER) of a circular contact through specific software.
Therefore, a measurement method that can obtain all configurations of the surface structure on a chip is urgently needed, and more particularly, a method that quickly obtains defect information such as the critical dimension uniformity (CDU) of the chip.